One type of integrated circuit is termed a flip chip and is a miniature, flat, typically rectangular, electronic device having on one side a plurality of solder contact deposits, i.e., slight protrusions or balls, termed contact bumps, usually in a spaced-apart linear perimetric array about its periphery. The bumps electrically and mechanically connect circuit components of the chip to those of a substrate, e.g., a ceramic or polymer substrate of electrically insulating and solder non-wettable material, on solder bonding the bumps to corresponding discrete contact areas of conductive leads (fingers) on the substrate.
The chip is normally flipped over so that the bumps depend from its underside, and the bumps are positioned in registering contact with the substrate circuit finger contact areas. On heating the bumps to effect molten solder flow (reflow), the chip floats on the solder and, unless controlled by control means, the solder flows beyond the finger contact areas under solder wicking (wetting), and chip weight squeezing, action.
Depending on the bump volume and spacing, molten solder surface tension and chip weight, this uncontrolled flow can lead to solder bond connections (joints) of uncontrolled shape, height and breadth, causing non-uniform operation and shorting out of circuit components, e.g., where the flows from adjacent bumps coalesce. Expansion and contraction stresses induced during thermal cycling of the chip and substrate in use can cause failure of these non-uniform solder joints.
As minimum spacing between bumps maximizes chip density (number of bumps and circuit components), increasing bump spacing to avoid this flow problem is unsuitable. Instead, a soldered substrate and chip combination of maximum component density for a given size chip, and having uniform solder joints, is obtained by using control means to control solder flow during the bonding step to confine each bump to its corresponding substrate finger contact area.
One control means involves mechanical standoff elements of extraneous material, such as vertical pins, walls or laminated layer columns, interposed between the chip and substrate to elevate the chip a desired height above the substrate when the solder is molten, for forming solder joints of controlled shape, height and breadth. These extraneous standoff elements require extra materials and steps, and precise location of the standoff elements on the chip and/or substrate.
Another control means involves solder flow controlling extraneous material layers, such as solder dams or chrome stops, applied on the substrate to limit the solder joints to confined finger contact areas. These dams and stops require extra materials and steps, precise location of the dams or stops at the contact areas, and precise alignment of the bumps and contact areas in positioning the chip on the substrate.
U.S. Pat. No. 3,871,015 (Lin et al.) shows a semiconductor chip connected by solder balls (bumps) on its underside to substrate finger contact areas, upon molten flow of the solder bumps in overlying contact with the contact areas. Standoff (i.e., the distance between chip and substrate) is maintained by using some copper bumps as standoff elements to space the chip and substrate during solder flow for preventing collapse of the solder bumps and shunting out (short circuiting) of chip elements. As copper is rigid [of 1083.degree. C. melting point, per Merck Index, 11th ed. 1989, p. 393], while solder is flexible, the copper joints with the fingers are fracture prone, consequent temperature changes (thermal cycling) between on and off states of the soldered chip and substrate in use that induce stresses due to differential chip and substrate thermal expansion.
As solder bumps tend to collapse during solder flow, the solder wettable area on the substrate is limited in the Lin et al. patent by use of fingers of solder non-wettable metal except in the contact areas which are of solder wettable metal, or by use of solder non-wettable dielectric material, e.g., solder dams, to confine the molten solder to the finger contact areas. Limiting the wettable area to confine the solder enables its molten surface tension to maintain a bump shape that supports the chip above the substrate (as a self-acting standoff).
The Lin et al. patent makes clear that the longer the standoff height, the greater the elongation of the molten solder bump for the wettable finger contact area, so that the solder bump dimensions on cooling to form the joint can be controlled by controlling the standoff height. By varying the geometry (wide or narrow bumps) or material (solder or copper bumps, or wettable finger contact area) among the joints, their stress resistance can be varied to decrease thermal cycle caused failure and increase joint life. However, copper standoff bumps and solder dams require extra materials and steps, copper joints are failure prone, and dams require precise location at the finger contact areas.
U.S. Pat. No. 4,604,644 (Beckham et al.) shows a semiconductor chip with solder bumps on its entire underside for area bonding to contact areas on the entire substrate surface, without use of standoff elements. A resin (adhesive) embeds the peripheral region of the bumps to increase chip and substrate edge bonding to offset thermal cycling induced stresses in use. As solder bumps exist on the entire chip underside in area bonding, chip weight squeezing action is obviously negligible.
U.S. Pat. No. 4,067,104 (Tracy) shows conductor columns, built up of indium layer areas in matrix photoresist layers by a stepwise process, on the entire top of a processor chip to connect its components (FET switches) to those (photodiodes) of an overlying detector chip upon area bonding of the columns to pads on the entire detector chip underside, without use of standoff elements. The photoresist layers embed the indium layers to prevent column distortion during bonding, after which the photoresist layers are removed by solvent dissolution. The photoresist layers are akin to solder dams and the indium columns are akin to solder bumps [indium being of 155.degree. C. melting point, per Merck Index, 11th ed. 1989, p. 784].
U.S. Pat. No. 4,878,611 (Lo Vasco et al.) shows area bonding of solder bumps on the entire underside of an integrated circuit package (chip) to mating solder bumps on a substrate, on molten coalescence of the opposed bumps. Standoff pins depend from the chip so that the pin ends are spaced from the substrate when the opposed bumps are in contact, to control bump collapse by limiting downward chip movement when the solder is molten. The standoff height controls solder joint height and shape in conjunction with flux applied to the bumps to reduce solder surface energy (surface tension). Standoff pins require extra materials and steps, precise pin location on the chip and precise pin alignment with opposing portions of the substrate.
U.S. Pat. No. 3,887,760 (Krieger et al.) shows glass layers in the nature of solder dams at the substrate finger contact areas. On solder flow, solder deposited on each finger is constricted by the dams to limit its flow to the contact area for bonding to a connection on the underside of an overlying semiconductor chip, without use of standoff means. These dams require extra materials and steps, precise dam location at the fingers and precise alignment of the chip connections and fingers on positioning the chip on the substrate.
U.S. Pat. No. 3,811,186 (Larnerd et al.) shows an integrated circuit chip with solder bumps on its underside that connect with mating solder bumps on a substrate upon solder flow under a hot gas flow squeezing pressure. Photoresist deposits applied to the substrate form hot gas flow pressure distortable solder dam and standoff means to control chip spacing and the height and shape of the mating bump joints during solder coalescing, after which the photoresist deposits may be dissolved away. These photoresist solder dam and standoff means require extra materials and steps, precise dam location at the substrate bumps and precise alignment of the chip bumps and substrate bumps on positioning the chip on the substrate.
U.S. Pat. No. 4,859,808 (Jeter et al., which is assigned to the same assignee as the present patent application) shows solder dams in a special pattern adjacent special finger contact areas of a substrate. The dams confine molten flow of solder bumps on a semiconductor chip underside for bonding the chip to the substrate within high misalignment tolerances between the bumps and contact areas, without use of standoff means.
It is desirable to provide standoff means to space an integrated circuit above a circuit containing substrate on solder flow bonding to discrete contact areas on the substrate of solder contact deposits or bumps depending from the integrated circuit underside, without the need for extra materials and steps or precise location of the standoff means on the substrate.